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DAC
2006
ACM
16 years 7 months ago
A parallelized way to provide data encryption and integrity checking on a processor-memory bus
This paper describes a novel engine, called PE-ICE (Parallelized Encryption and Integrity Checking Engine), enabling to guarantee confidentiality and integrity of data exchanged b...
Reouven Elbaz, Lionel Torres, Gilles Sassatelli, P...
SADFE
2008
IEEE
16 years 20 days ago
Protecting Digital Legal Professional Privilege (LPP) Data
To enable free communication between legal advisor and his client for proper functioning of the legal system, certain documents, known as Legal professional privilege (LPP) docume...
Frank Y. W. Law, Pierre K. Y. Lai, Zoe L. Jiang, R...
BMCBI
2011
14 years 10 months ago
FIND: A new software tool and development platform for enhanced multicolor flow analysis
Background: Flow Cytometry is a process by which cells, and other microscopic particles, can be identified, counted, and sorted mechanically through the use of hydrodynamic pressu...
Shareef Dabdoub, William C. Ray, Sheryl S. Justice
SIPS
2007
IEEE
16 years 17 days ago
Dynamic Channel Flow Control of Networks-on-Chip Systems for High Buffer Efficiency
System-on-Chip (SoC) designs become more complex nowadays. The communication between each processing element often suffers challenges due to the wiring problem. Networks-on-Chip (...
Sung-Tze Wu, Chih-Hao Chao, I-Chyn Wey, An-Yeu Wu
DSD
2006
IEEE
110views Hardware» more  DSD 2006»
16 years 10 days ago
A Flexible, Syntax Independent Representation (SIR) for System Level Design Models
System Level Design (SLD) is widely seen as a solution for bridging the gap between chip complexity and design productivity of Systems on Chip (SoC). SLD relieves the designer fro...
Ines Viskic, Rainer Dömer