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LCTRTS
2010
Springer
16 years 26 days ago
Operation and data mapping for CGRAs with multi-bank memory
Coarse Grain Reconfigurable Architectures (CGRAs) promise high performance at high power efficiency. They fulfil this promise by keeping the hardware extremely simple, and movi...
Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunh...
GROUP
2003
ACM
15 years 11 months ago
Supporting activity-centric collaboration through peer-to-peer shared objects
We describe a new collaborative technology that is mid-way between the informality of email and the formality of shared workspaces. Email and other ad hoc collaboration systems ar...
Werner Geyer, Jürgen Vogel, Li-Te Cheng, Mich...
DATE
2005
IEEE
96views Hardware» more  DATE 2005»
15 years 11 months ago
Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip
In this paper is proposed a technique to integrate and simulate a dynamic memory in a multiprocessor framework based on C/C++/SystemC. Using host machine’s memory management cap...
Oreste Villa, Patrick Schaumont, Ingrid Verbauwhed...
ECEASST
2008
67views more  ECEASST 2008»
15 years 6 months ago
Sharing OCL Constraints by Using Web Rules
This paper presents an MDE-based approach to interchanging rules between the Object Constraint Language (OCL) and REWERSE I1 Rule Markup Language (R2ML). The R2ML tends to be a sta...
Milan Milanovic, Dragan Gasevic, Adrian Giurca, Ge...
ISCA
2006
IEEE
148views Hardware» more  ISCA 2006»
16 years 1 days ago
Tolerating Dependences Between Large Speculative Threads Via Sub-Threads
Thread-level speculation (TLS) has proven to be a promising method of extracting parallelism from both integer and scientific workloads, targeting speculative threads that range ...
Christopher B. Colohan, Anastassia Ailamaki, J. Gr...