4278 search results - page 270 / 856 » Data prefetch mechanisms |
182
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ICCAD
2001
IEEE
16 years 3 months ago
2001
IEEE
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
177
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IEEEPACT
2008
IEEE
16 years 1 months ago
2008
IEEE
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
163
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EMSOFT
2007
Springer
16 years 26 days ago
2007
Springer
This paper describes techniques to estimate the worst case execution time of executable code on architectures with data caches. The underlying mechanism is Abstract Interpretation...
186
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VISUALIZATION
1997
IEEE
15 years 11 months ago
1997
IEEE
Recursive subdivision schemes have been extensively used in computer graphics and scientific visualization for modeling smooth surfaces of arbitrary topology. Recursive subdivisi...
202
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ISCA
1995
IEEE
15 years 10 months ago
1995
IEEE
For many programs, especially integer codes, untolerated load instruction latencies account for a significant portion of total execution time. In this paper, we present the desig...