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ISLPED
1999
ACM
150views Hardware» more  ISLPED 1999»
15 years 11 months ago
Using dynamic cache management techniques to reduce energy in a high-performance processor
In this paper, we propose a technique that uses an additional mini cache, the L0-Cache, located between the instruction cache I-Cache and the CPU core. This mechanism can provid...
Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. P...
ISCA
1999
IEEE
94views Hardware» more  ISCA 1999»
15 years 11 months ago
A Performance Comparison of Contemporary DRAM Architectures
In response to the growing gap between memory access time and processor speed, DRAM manufacturers have created several new DRAM architectures. This paper presents a simulation-bas...
Vinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor ...
HT
1998
ACM
15 years 11 months ago
XHMBS: A Formal Model to Support Hypermedia Specification
This paper introduces XHMBS (the eXtended Hyperdocument Model Based on Statecharts) to support the formal specification of general hypermedia applications. XHMBS uses a novel form...
Fabiano Borges Paulo, Marcelo Augusto Santos Turin...
HPDC
1996
IEEE
15 years 11 months ago
On-Demand Hypermedia/Multimedia Service over Broadband Networks
In this paper we present a uni ed approach for delivering hypermedia/multimedia objects over broadband networks. Documents are stored in various multimedia servers, while the inli...
Christos Bouras, Vaggelis Kapoulas, D. Miras, Vagg...
FSE
1997
Springer
280views Cryptology» more  FSE 1997»
15 years 11 months ago
New Block Encryption Algorithm MISTY
We propose secret-key cryptosystems MISTY1 and MISTY2, which are block ciphers with a 128-bit key, a 64-bit block and a variable number of rounds. MISTY is a generic name for MISTY...
Mitsuru Matsui