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BMCBI
2008
130views more  BMCBI 2008»
15 years 6 months ago
IDEA: Interactive Display for Evolutionary Analyses
Background: The availability of complete genomic sequences for hundreds of organisms promises to make obtaining genome-wide estimates of substitution rates, selective constraints ...
Amy Egan, Anup Mahurkar, Jonathan Crabtree, Jonath...
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
15 years 4 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
CANPC
1999
Springer
15 years 10 months ago
Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
David Brooks, Margaret Martonosi
CONCUR
1998
Springer
15 years 10 months ago
Algebraic Techniques for Timed Systems
Performance evaluation is a central issue in the design of complex real-time systems. In this work, we propose an extension of socalled "Max-Plus" algebraic techniques to...
Albert Benveniste, Claude Jard, Stephane Gaubert
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 4 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt