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IEEEPACT
2005
IEEE
16 years 8 days ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
ISPASS
2005
IEEE
16 years 7 days ago
Reaping the Benefit of Temporal Silence to Improve Communication Performance
Communication misses--those serviced by dirty data in remote caches--are a pressing performance limiter in shared-memory multiprocessors. Recent research has indicated that tempor...
Kevin M. Lepak, Mikko H. Lipasti
LCPC
2005
Springer
16 years 5 days ago
Optimizing Packet Accesses for a Domain Specific Language on Network Processors
Programming network processors remains a challenging task since their birth until recently when high-level programming environments for them are emerging. By employing domain speci...
Tao Liu, Xiao-Feng Li, Lixia Liu, Chengyong Wu, Ro...
MMSEC
2004
ACM
137views Multimedia» more  MMSEC 2004»
16 years 2 days ago
Perturbed quantization steganography with wet paper codes
In this paper, we introduce a new approach to passive-warden steganography in which the sender embeds the secret message into a certain subset of the cover object without having t...
Jessica J. Fridrich, Miroslav Goljan, David Soukal
SIGSOFT
2004
ACM
16 years 2 days ago
Correlation exploitation in error ranking
Static program checking tools can find many serious bugs in software, but due to analysis limitations they also frequently emit false error reports. Such false positives can easi...
Ted Kremenek, Ken Ashcraft, Junfeng Yang, Dawson R...