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ISSS
1996
IEEE
143views Hardware» more  ISSS 1996»
15 years 10 months ago
DSP Processor/Compiler Co-Design: A Quantitative Approach
In the paper the problem of processor/compiler codesign for digital signal processing and embedded SYstems is discussed. The main principle we follow is the top-down approach char...
Vojin Zivojnovic, Stefan Pees, C. Schälger, M...
GLOBECOM
2008
IEEE
16 years 26 days ago
Networked Embedded Systems: A Quantitative Performance Comparison
— Networked embedded systems are gaining more and more attention and their use in current network scenarios is of indisputable importance. Research community and industry are pro...
Alessio Botta, Walter de Donato, Antonio Pescap&eg...
EMSOFT
2009
Springer
16 years 29 days ago
Handling mixed-criticality in SoC-based real-time embedded systems
System-on-Chip (SoC) is a promising paradigm to implement safety-critical embedded systems, but it poses significant challenges from a design and verification point of view. In ...
Rodolfo Pellizzoni, Patrick O'Neil Meredith, Min-Y...
ICCSA
2010
Springer
15 years 11 months ago
Geospatial Analysis of Cooperative Works on Asymmetric Information Environment
In the so-called Information-Explosion Era, astronomical amount of information is ubiquitously produced and digitally stored. It is getting more and more convenient for cooperative...
Tetsuya Kusuda, Tetsuro Ogi
VLSID
2009
IEEE
143views VLSI» more  VLSID 2009»
16 years 7 months ago
SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems
Dynamic reconfiguration techniques are widely used for efficient system optimization. Dynamic cache reconfiguration is a promising approach for reducing energy consumption as well...
Weixun Wang, Prabhat Mishra, Ann Gordon-Ross