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ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
15 years 12 months ago
A tunable bus encoder for off-chip data buses
Off-Chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to red...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
CASES
2003
ACM
15 years 11 months ago
Clustered calculation of worst-case execution times
Knowing the Worst-Case Execution Time (WCET) of a program is necessary when designing and verifying real-time systems. A correct WCET analysis method must take into account the po...
Andreas Ermedahl, Friedhelm Stappert, Jakob Engblo...
EDBT
2010
ACM
188views Database» more  EDBT 2010»
15 years 9 months ago
DEDUCE: at the intersection of MapReduce and stream processing
MapReduce and stream processing are two emerging, but different, paradigms for analyzing, processing and making sense of large volumes of modern day data. While MapReduce offers t...
Vibhore Kumar, Henrique Andrade, Bugra Gedik, Kun-...
CODES
2008
IEEE
15 years 8 months ago
Profiling of lossless-compression algorithms for a novel biomedical-implant architecture
In view of a booming market for microelectronic implants, our ongoing research work is focusing on the specification and design of a novel biomedical microprocessor core targeting...
Christos Strydis, Georgi Gaydadjiev
ICCAD
2002
IEEE
141views Hardware» more  ICCAD 2002»
16 years 3 months ago
A hierarchical modeling framework for on-chip communication architectures
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
Xinping Zhu, Sharad Malik