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IPPS
2006
IEEE
16 years 17 days ago
Multiprocessor on chip: beating the simulation wall through multiobjective design space exploration with direct execution
Design space exploration of multiprocessors on chip requires both automatic performance analysis techniques and efficient multiprocessors configuration performance evaluation. Pr...
Riad Ben Mouhoub, Omar Hammami
ISCAS
2005
IEEE
138views Hardware» more  ISCAS 2005»
16 years 3 days ago
A low spur fractional-N frequency synthesizer architecture
— A new architecture of a fractional-N phase-locked loop (PLL) frequency synthesizer is presented in this paper. The unique feature of the proposed frequency synthesizer is a loo...
Volodymyr Kratyuk, Pavan Kumar Hanumolu, Un-Ku Moo...
IV
2005
IEEE
138views Visualization» more  IV 2005»
16 years 3 days ago
Visual Exploration of the Spatial Distribution of Temporal Behaviors
The paper elaborates on the previous research on the analysis of temporal and spatio-temporal data done in statistical graphics and geo-visualization. We focus on the exploration ...
Gennady L. Andrienko, Natalia V. Andrienko
IWIA
2005
IEEE
16 years 3 days ago
Attack-Potential-Based Survivability Modeling for High-Consequence Systems
Previous quantitative models of security or survivability have been defined on a range of probable intruder behavior. This measures survivability as a statistic such as mean time...
John McDermott
MSWIM
2005
ACM
16 years 3 days ago
Comparison of multi-channel MAC protocols
This paper compares, through analysis and simulation, a number of multichannel MAC protocols for wireless networks. We first classify these protocols into 4 categories based on t...
Jeonghoon Mo, Hoi-sheung Wilson So, Jean C. Walran...