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DATE
2006
IEEE
114views Hardware» more  DATE 2006»
16 years 19 days ago
A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmap
Built-in self-repair (BISR) technique is gaining popular for repairing embedded memory cores in system-onchips (SOCs). To increase the utilization of memory redundancy, the BISR t...
Tsu-Wei Tseng, Jin-Fu Li, Da-Ming Chang
CIKM
2005
Springer
16 years 3 days ago
Generating better concept hierarchies using automatic document classification
This paper presents a hybrid concept hierarchy development technique for web returned documents retrieved by a meta-search engine. The aim of the technique is to separate the init...
Razvan Stefan Bot, Yi-fang Brook Wu, Xin Chen, Qua...
IWPC
2002
IEEE
15 years 11 months ago
An Integrated Approach for Studying Architectural Evolution
Studying how a software system has evolved over time is difficult, time consuming, and costly; existing techniques are often limited in their applicability, are hard to extend, a...
Qiang Tu, Michael W. Godfrey
IPPS
1999
IEEE
15 years 11 months ago
Cascaded Execution: Speeding Up Unparallelized Execution on Shared-Memory Multiprocessors
Both inherently sequential code and limitations of analysis techniques prevent full parallelization of many applications by parallelizing compilers. Amdahl's Law tells us tha...
Ruth E. Anderson, Thu D. Nguyen, John Zahorjan
COMPSAC
2005
IEEE
15 years 8 months ago
A Low-Latency Checkpointing Scheme for Mobile Computing Systems
Fault-tolerant mobile computing systems have different requirements and restrictions, not taken into account by conventional distributed systems. This paper presents a coordinate...
Guohui Li, LihChyun Shu