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ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
15 years 11 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
ARTS
1997
Springer
15 years 10 months ago
The Verus Language: Representing Time Efficiently with BDDs
There have been significant advances on formal methods to verify complex systems recently. Nevertheless, these methods have not yet been accepted as a realistic alternative to the ...
Sérgio Vale Aguiar Campos, Edmund M. Clarke
ATAL
2008
Springer
15 years 8 months ago
Quantifying over coalitions in epistemic logic
Some natural epistemic properties which may arise in applications can only be expressed in standard epistemic logic by formulae which are exponentially long in the number of agent...
Thomas Ågotnes, Wiebe van der Hoek, Michael ...
IIWAS
2008
15 years 8 months ago
A model-prover for constrained dynamic conversations
In a service-oriented architecture, systems communicate by exchanging messages. In this work, we propose a formal model based on OCL-constrained UML Class diagrams and a methodolo...
Diletta Cacciagrano, Flavio Corradini, Rosario Cul...
PLANX
2008
15 years 8 months ago
Linear Time Membership for a Class of XML Types with Interleaving and Counting
Regular Expressions (REs) form the basis of most XML type languages, such as DTDs, XML Schema types, and XDuce types (Thompson et al. 2004; Hosoya and Pierce 2003). In this contex...
Giorgio Ghelli, Dario Colazzo, Carlo Sartiani