Compact and high-speed hardware architectures and logic optimization methods for the AES algorithm Rijndael are described. Encryption and decryption data paths are combined and all...
This paper describes several speedups and simplifications for XTR. The most important results are new XTR double and single exponentiation methods where the latter requires a chea...
We show that a positive definite integral ternary form can be reduced with O(M(s) log2 s) bit operations, where s is the binary encoding length of the form and M(s) is the bit-com...
This paper describes an algorithm and architecture based on an extension of a scalable radix-2 architecture proposed in a previous work. The algorithm is proven to be correct and t...
We initiate a study of on-line ciphers. These are ciphers that can take input plaintexts of large and varying lengths and will output the ith block of the ciphertext after having p...
Mihir Bellare, Alexandra Boldyreva, Lars R. Knudse...