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GLVLSI
2003
IEEE
177views VLSI» more  GLVLSI 2003»
16 years 3 days ago
Congestion reduction in traditional and new routing architectures
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Ameya R. Agnihotri, Patrick H. Madden
183
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GLVLSI
2003
IEEE
152views VLSI» more  GLVLSI 2003»
16 years 3 days ago
Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
Frank Grassert, Dirk Timmermann
HLK
2003
IEEE
16 years 2 days ago
Generic Deformable Implicit Mesh Models for Automated Reconstruction
Deformable 3–D models can be represented either as explicit or implicit surfaces. Explicit surfaces, such as triangulations or wire-frame models, are widely accepted in the Comp...
Slobodan Ilic, Pascal Fua
ICCAD
2003
IEEE
193views Hardware» more  ICCAD 2003»
16 years 2 days ago
FROSTY: A Fast Hierarchy Extractor for Industrial CMOS Circuits
: This paper presents FROSTY, a computer program for automatically extracting the hierarchy of a large-scale digital CMOS circuit from its transistor-level netlist description and ...
Lei Yang, C.-J. Richard Shi
ICDAR
2003
IEEE
16 years 2 days ago
Writer Identification using Innovative Binarised Features of Handwritten Numerals
The objective of this paper is to present a number of features that can be extracted from handwritten digits and used for author verification or identification of a person’s han...
Graham Leedham, Sumit Chachra
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