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180
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ICCAD
2001
IEEE
91views Hardware» more  ICCAD 2001»
16 years 3 months ago
A System for Synthesizing Optimized FPGA Hardware from MATLAB
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
Malay Haldar, Anshuman Nayak, Alok N. Choudhary, P...
CF
2004
ACM
16 years 9 days ago
MaRS: a macro-pipelined reconfigurable system
We introduce MaRS, a reconfigurable, parallel computing engine with special emphasis on scalability, lending itself to the computation-/data-intensive multimedia data processing a...
Nozar Tabrizi, Nader Bagherzadeh, Amir Hosein Kama...
COLING
1990
15 years 8 months ago
The BICORD System: Combining Lexical Information from Bilingual Corpora and Machine Readable Dictionaries
Our goal is to explore methods for combining structured but incomplete information from dictionaries with the unstructured but more complete information available in corpora for t...
Judith Klavans, Evelyne Tzoukermann
183
Voted
SPRINGSIM
2010
15 years 5 months ago
Advanced IDE for modeling and simulation of discrete event systems
: Creating models and analyzing simulation results can be a difficult and time-consuming task, especially for non-experienced users. Although several DEVS simulators have been deve...
Matías Bonaventura, Gabriel A. Wainer, Rodr...
DAC
2001
ACM
16 years 7 months ago
A2BC: Adaptive Address Bus Coding for Low Power Deep Sub-Micron Designs
Due to larger buses (length, width) and deep sub-micron effects where coupling capacitances between bus lines are in the same order of magnitude as base capacitances, power consum...
Haris Lekatsas, Jörg Henkel