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IPPS
2007
IEEE
16 years 29 days ago
A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
Ehsan Atoofian, Amirali Baniasadi
IPPS
2007
IEEE
16 years 29 days ago
The Design and Implementation of Checkpoint/Restart Process Fault Tolerance for Open MPI
To be able to fully exploit ever larger computing platforms, modern HPC applications and system software must be able to tolerate inevitable faults. Historically, MPI implementati...
Joshua Hursey, Jeffrey M. Squyres, Timothy Mattox,...
IROS
2007
IEEE
158views Robotics» more  IROS 2007»
16 years 29 days ago
Feature selection in conditional random fields for activity recognition
Abstract— Temporal classification, such as activity recognition, is a key component for creating intelligent robot systems. In the case of robots, classification algorithms mus...
Douglas L. Vail, John D. Lafferty, Manuela M. Velo...
ISVLSI
2007
IEEE
121views VLSI» more  ISVLSI 2007»
16 years 28 days ago
Data Recovery Block Design for Impulse Modulated Power Line Communications in a Microprocessor
Power line communications (PLC) using impulse ultra wideband (UWB) in a microprocessor had been proposed for ubiquitous access of internal nodes for test/debug purposes. In this p...
Rajesh Thirugnanam, Dong Sam Ha, T. M. Mak
SMI
2007
IEEE
164views Image Analysis» more  SMI 2007»
16 years 28 days ago
Automatic multiview quadruple alignment of unordered range scans
This paper presents a new multiview alignment algorithm that performs both the coarse and fine alignment of unordered sets of range scans. Our algorithm selects quadruples of ran...
Frank B. ter Haar, Remco C. Veltkamp
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