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CHES
2008
Springer
260views Cryptology» more  CHES 2008»
15 years 8 months ago
Mutual Information Analysis
We propose a generic information-theoretic distinguisher for differential side-channel analysis. Our model of side-channel leakage is a refinement of the one given by Standaert et ...
Benedikt Gierlichs, Lejla Batina, Pim Tuyls, Bart ...
CHES
2000
Springer
204views Cryptology» more  CHES 2000»
15 years 10 months ago
Using Second-Order Power Analysis to Attack DPA Resistant Software
Under a simple power leakage model based on Hamming weight, a software implementation of a data-whitening routine is shown to be vulnerable to a first-order Differential Power Anal...
Thomas S. Messerges
ASPDAC
2006
ACM
157views Hardware» more  ASPDAC 2006»
15 years 12 months ago
Delay modeling and static timing analysis for MTCMOS circuits
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
Naoaki Ohkubo, Kimiyoshi Usami
ICISC
2009
125views Cryptology» more  ICISC 2009»
15 years 3 months ago
Power Analysis of Single-Rail Storage Elements as Used in MDPL
Several dual-rail logic styles make use of single-rail flip-flops for storing intermediate states. We show that single mask bits, as applied by various side-channel resistant logic...
Amir Moradi, Thomas Eisenbarth, Axel Poschmann, Ch...
SLIP
2009
ACM
16 years 12 days ago
Predicting the worst-case voltage violation in a 3D power network
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...
Wanping Zhang, Wenjian Yu, Xiang Hu, Amirali Shaya...