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IPPS
2007
IEEE
16 years 27 days ago
RAxML-Cell: Parallel Phylogenetic Tree Inference on the Cell Broadband Engine
Computational phylogeny is a challenging application even for the most powerful supercomputers. It is also an ideal candidate for benchmarking emerging multiprocessor architecture...
Filip Blagojevic, Alexandros Stamatakis, Christos ...
ICDAR
2005
IEEE
16 years 5 days ago
Unconstrained Numeral Pair Recognition Using Enhanced Error Correcting Output Coding: A Holistic Approach
– This paper describes a new approach to recognize touching numeral strings. Currently most methods for numeral string recognition require segmenting the string image into separa...
Jie Zhou, Ching Y. Suen
ISLPED
2003
ACM
88views Hardware» more  ISLPED 2003»
15 years 12 months ago
Reducing data cache energy consumption via cached load/store queue
High-performance processors use a large set–associative L1 data cache with multiple ports. As clock speeds and size increase such a cache consumes a significant percentage of t...
Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru...
IPPS
2002
IEEE
15 years 11 months ago
System-Level Analysis for MPEG-4 Decoding on a Multi-Processor Architecture
The convergence of TV and new features such as Internet and games, requires a generic media-processing platform, that enables simultaneous execution of very diverse tasks, ranging...
Egbert G. T. Jaspers, Erik B. van der Tol, Peter H...
CODES
1999
IEEE
15 years 11 months ago
System synthesis utilizing a layered functional model
We propose a system synthesis method which bridges the gap between a highly abstract functional model and an efficient hardware or software implementation. The functional model is...
Ingo Sander, Axel Jantsch