4451 search results - page 230 / 891 » Continuous model synthesis |
128
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IEAAIE
1999
Springer
15 years 10 months ago
1999
Springer
This paper introduces a new approach in the debugging of hardware designs. The design is given as a VHDL program and converted in a component connection model. The conversion is si...
184
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EURODAC
1995
IEEE
15 years 10 months ago
1995
IEEE
With VHDL models increasing their size, it becomes more important to assure the quality of these descriptions in order to improve simulation performances, to make project maintain...
197
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TVLSI
1998
15 years 6 months ago
1998
—In this paper, we propose a robust register-transfer level (RTL) power modeling methodology for functional units. Our models are consistently accurate over a wide range of input...
312
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TASE
2012
IEEE
14 years 2 months ago
2012
IEEE
— This paper presents new results on the formal design of distributed coordinating agents in a discrete-event framework. In this framework, agents are modeled to be individually ...
194
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CVPR
2004
IEEE
16 years 8 months ago
2004
IEEE
All non-trivial stereo problems need model priors to deal with ambiguities and noise perturbations. To meet requirements of increasingly demanding tasks such as modeling for rende...