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FPGA
1995
ACM
120views FPGA» more  FPGA 1995»
15 years 10 months ago
Synthesis of Signal Processing Structured Datapaths for FPGAs Supporting RAMs and Busses
A novel approach is presented for transforming a given scheduled and bound signal processing algorithm for a multiplexer based datapath to a BUS/RAM based FPGA datapath. A datapat...
Baher Haroun, Behzad Sajjadi
ISSS
1995
IEEE
109views Hardware» more  ISSS 1995»
15 years 10 months ago
1995 high level synthesis design repository
In this paper we brie y describe a set of designs that can serve as examples for High Level Synthesis (HLS) systems. The designs vary in complexity from simple behavioral nite st...
Preeti Ranjan Panda, Nikil D. Dutt
AMC
2007
91views more  AMC 2007»
15 years 6 months ago
Deterministic and random synthesis of discrete chaos
In this paper, two anticontrol algorithms for synthesis of discrete chaos are introduced. In these algorithms, the control parameter of a discrete dynamical system is switched, ei...
Miguel Romera, Michael Small, Marius-F. Danca
CORR
2006
Springer
112views Education» more  CORR 2006»
15 years 6 months ago
High-level synthesis under I/O Timing and Memory constraints
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
Philippe Coussy, Gwenolé Corre, Pierre Bome...
ENTCS
2007
120views more  ENTCS 2007»
15 years 6 months ago
Non-Interference Control Synthesis for Security Timed Automata
In this paper, the problem of synthesizing controllers that ensures non interference for multilevel security dense timed discrete event systems modeled by an extension of Timed Au...
Guillaume Gardey, John Mullins, Olivier H. Roux