Hardware predictor designers have incorporated hysteresis and/or bias to achieve desired behavior by increasing the number of bits per counter. Some resulting proposed predictor de...
Future CSCL technologies are described by the community as flexible, tailorable, negotiable, and appropriate for various collaborative settings, conditions and contexts. This paper...
This paper presents a new design methodology able to bridge the gap between an abstract specification and a heterogeneous recone architecture. The EPICURE contribution is the resu...
Jean-Philippe Diguet, Guy Gogniat, Jean Luc Philip...
Achieving high performance for concurrent applications on modern multiprocessors remains challenging. Many programmers avoid locking to improve performance, while others replace l...
Thomas E. Hart, Paul E. McKenney, Angela Demke Bro...
An experiment was carried out to estimate the effect of auditory alarms on the work of an plant operator in the context of a computer simulation. We designed our process simulator...