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DATE
1997
IEEE
88views Hardware» more  DATE 1997»
15 years 11 months ago
VHDL extensions for complex transmission line simulation
This paper proposes extensions to the VHDL grammar and de nes new semantics in the language to model the timing behavior of high frequency buses and clock lines with multiple, dis...
Peter Walker, Sumit Ghosh
EUROCRYPT
1994
Springer
15 years 11 months ago
Designated Confirmer Signatures
Abstract. We construct the first O(1)-size designated confirmer signatures (DCS) with security in the state-of-the-art model of Camenisch and Michels, Eurocrypt 2000, without rando...
David Chaum
FORMATS
2006
Springer
15 years 10 months ago
From MITL to Timed Automata
Abstract. We show how to transform formulae written in the real-time temporal logic MITL into timed automata that recognize their satisfying models. This compositional construction...
Oded Maler, Dejan Nickovic, Amir Pnueli
WSC
2007
15 years 9 months ago
A Bayesian approach to analysis of limit standards
Limit standards are probabilistic requirements or benchmarks regarding the proportion of replications conforming or not conforming to a desired threshold. Sample proportions resul...
Roy R. Creasey Jr., K. Preston White Jr.
WSC
2004
15 years 8 months ago
Simulation Output Analysis Based on Excursions
We consider the steady state output analysis problem for a process that satisfies a functional central limit theorem. We construct asymptotically valid confidence intervals for th...
James M. Calvin