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ICASSP
2011
IEEE
14 years 10 months ago
Optimum chip pulse shape design for timing synchronization
In this work a systematic methodology is presented to design optimum chip pulse shapes for DS-CDMA systems for timing synchronization. A nonlinear bi-objective problem with additi...
Felix Antreich, Josef A. Nossek
KDD
2005
ACM
162views Data Mining» more  KDD 2005»
16 years 7 months ago
Discovering frequent topological structures from graph datasets
The problem of finding frequent patterns from graph-based datasets is an important one that finds applications in drug discovery, protein structure analysis, XML querying, and soc...
Ruoming Jin, Chao Wang, Dmitrii Polshakov, Sriniva...
ITC
1998
IEEE
114views Hardware» more  ITC 1998»
15 years 11 months ago
BETSY: synthesizing circuits for a specified BIST environment
This paper presents a logic synthesis tool called BETSY (BIST Environment Testable Synthesis) for synthesizing circuits that achieve complete (100%)fault coverage in a user specif...
Zhe Zhao, Bahram Pouya, Nur A. Touba
CINQ
2004
Springer
157views Database» more  CINQ 2004»
15 years 10 months ago
Inductive Databases and Multiple Uses of Frequent Itemsets: The cInQ Approach
Inductive databases (IDBs) have been proposed to afford the problem of knowledge discovery from huge databases. With an IDB the user/analyst performs a set of very different operat...
Jean-François Boulicaut
INFOCOM
2006
IEEE
16 years 24 days ago
Cross-Layer Congestion Control, Routing and Scheduling Design in Ad Hoc Wireless Networks
Abstract— This paper considers jointly optimal design of crosslayer congestion control, routing and scheduling for ad hoc wireless networks. We first formulate the rate constrai...
Lijun Chen, Steven H. Low, Mung Chiang, John C. Do...