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ICCD
2006
IEEE
77views Hardware» more  ICCD 2006»
16 years 3 months ago
Iterative-Constructive Standard Cell Placer for High Speed and Low Power
Abstract— Timing and low power emerge as the most important goals in contemporary design. Meanwhile, the majority of placement algorithms developed by industry and academia still...
Sungjae Kim, Eugene Shragowitz
ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
16 years 3 months ago
A Two-Layer Bus Routing Algorithm for High-Speed Boards
The increasing clock frequencies in high-end industrial circuits bring new routing challenges that can not be handled by traditional algorithms. An important design automation pro...
Muhammet Mustafa Ozdal, Martin D. F. Wong
ICCAD
2007
IEEE
160views Hardware» more  ICCAD 2007»
16 years 3 months ago
Approximation algorithm for the temperature-aware scheduling problem
— The paper addresses the problem of performance optimization for a set of periodic tasks with discrete voltage/frequency states under thermal constraints. We prove that the prob...
Sushu Zhang, Karam S. Chatha
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ICCAD
2006
IEEE
93views Hardware» more  ICCAD 2006»
16 years 3 months ago
Precise identification of the worst-case voltage drop conditions in power grid verification
– Identifying worst-case voltage drop conditions in every module supplied by the power grid is a crucial problem in modern IC design. In this paper we develop a novel methodology...
Nestoras E. Evmorfopoulos, Dimitris P. Karampatzak...
ICCAD
2005
IEEE
151views Hardware» more  ICCAD 2005»
16 years 3 months ago
Architecture and details of a high quality, large-scale analytical placer
Modern design requirements have brought additional complexities to netlists and layouts. Millions of components, whitespace resources, and fixed/movable blocks are just a few to ...
Andrew B. Kahng, Sherief Reda, Qinke Wang
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