Sciweavers

7557 search results - page 1114 / 1512
» Constraints as a design pattern
Sort
View
191
Voted
ISCA
2009
IEEE
158views Hardware» more  ISCA 2009»
16 years 1 months ago
Boosting single-thread performance in multi-core systems through fine-grain multi-threading
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, single thread performance remains of paramount importance since some applicatio...
Carlos Madriles, Pedro López, Josep M. Codi...
RSP
2007
IEEE
143views Control Systems» more  RSP 2007»
16 years 1 months ago
Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs
Multiprocessor Systems-on-Chip (MPSoCs) is a trend in VLSI design, since they minimize the “design crisis” (gap between silicon technology and actual SoC design capacity) and ...
Ewerson Carvalho, Ney Calazans, Fernando Moraes
189
Voted
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
16 years 27 days ago
SODA: A Low-power Architecture For Software Radio
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scot...
188
Voted
SBCCI
2005
ACM
114views VLSI» more  SBCCI 2005»
16 years 13 days ago
Traffic generation and performance evaluation for mesh-based NoCs
The designer of a system on a chip (SoC) that connects IP cores through a network on chip (NoC) needs methods to support application performance evaluation. Two key aspects these ...
Leonel Tedesco, Aline Mello, Diego Garibotti, Ney ...
ICWE
2005
Springer
16 years 11 days ago
Modelling the Behaviour of Web Applications with ArgoUWE
A methodology needs to be empowered by appropriate tool support. The CASE tool ArgoUWE supports designers in the use of the UWE methodology for the systematic, UML-based developmen...
Alexander Knapp, Nora Koch, Gefei Zhang
« Prev « First page 1114 / 1512 Last » Next »