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ISCAS
2006
IEEE
102views Hardware» more  ISCAS 2006»
16 years 9 days ago
A low power merge cell processor for real-time spike sorting in implantable neural prostheses
Extremely low power consumption is the critical constraint for designing implantable neural decoders that inter- Desired face directly with the nervous system. Typically a system w...
M. D. Linderman, T. H. Meng
ICIP
2010
IEEE
15 years 4 months ago
An integer programming approach to visual compliance
Visual compliance has emerged as a new paradigm to ensure that employees comply with processes and policies in a business context [1]. In this paper, we focus on videos from retai...
Lei Ding, Quanfu Fan, Sharath Pankanti
CCE
2008
15 years 6 months ago
Chance constrained programming approach to process optimization under uncertainty
Deterministic optimization approaches have been well developed and widely used in the process industry to accomplish off-line and on-line process optimization. The challenging tas...
Pu Li, Harvey Arellano-Garcia, Günter Wozny
WIOPT
2010
IEEE
15 years 4 months ago
Optimizing power allocation in interference channels using D.C. programming
Abstract--Power allocation is a promising approach for optimizing the performance of mobile radio systems in interference channels. In the present paper, the non-convex objective f...
Hussein Al-Shatri, Tobias Weber
DAC
1996
ACM
15 years 10 months ago
Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures
In this paper we address the problem of code generation for basic blocks in heterogeneous memory-register DSP processors. We propose a new a technique, based on register-transfer ...
Guido Araujo, Sharad Malik, Mike Tien-Chien Lee