6554 search results - page 877 / 1311 » Constraint Logic Programming |
194
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TVLSI
2008
15 years 6 months ago
2008
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...
249
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ICDAR
2009
IEEE
15 years 4 months ago
2009
IEEE
The paper describes a new approach using a Conditional Random Fields (CRFs) to extract physical and logical layouts in unconstrained handwritten letters such as those sent by indi...
207
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CSFW
2011
IEEE
14 years 6 months ago
2011
IEEE
—This paper introduces YARRA, a conservative extension to C to protect applications from non-control data attacks. YARRA programmers specify their data integrity requirements by ...
182
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INFOCOM
2006
IEEE
16 years 25 days ago
2006
IEEE
nts etc.), an abstract graph of the deployment area and QoS constraints to generate appropriate logical topologies. WIND starts with the set of network elements to be deployed (Nod...
207
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DEBS
2008
ACM
15 years 8 months ago
2008
ACM
Availability of an overlay network is a necessary condition for event delivery in event based systems. The availability of the overlay links depends on the underlying physical net...