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TASE
2008
IEEE
15 years 6 months ago
An Extension to Pointer Logic for Verification
The safety of pointer programs is an important issue in high-assurance software design, and their verification remains a major challenge. Pointer Logic has been proposed to verify...
Zhifang Wang, Yiyun Chen, Zhenming Wang, Wei Wang,...
CP
2008
Springer
15 years 8 months ago
A Geometric Constraint over k-Dimensional Objects and Shapes Subject to Business Rules
This paper presents a global constraint that enforces rules written in a language based on arithmetic and first-order logic to hold among a set of objects. In a first step, the rul...
Mats Carlsson, Nicolas Beldiceanu, Julien Martin
AAAI
2006
15 years 8 months ago
Local-Search Techniques for Boolean Combinations of Pseudo-Boolean Constraints
Some search problems are most directly specified by boolean combinations of pseudo-boolean constraints. We study a logic PL(PB) whose formulas are of this form, and design local-s...
Lengning Liu, Miroslaw Truszczynski
ILP
2005
Springer
16 years 4 days ago
Logical Bayesian Networks and Their Relation to Other Probabilistic Logical Models
Abstract. Logical Bayesian Networks (LBNs) have recently been introduced as another language for knowledge based model construction of Bayesian networks, besides existing languages...
Daan Fierens, Hendrik Blockeel, Maurice Bruynooghe...
DFT
2003
IEEE
113views VLSI» more  DFT 2003»
15 years 12 months ago
Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...