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VLSI
2005
Springer
16 years 8 days ago
Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint
1 The increasing test data volume required to ensure high test quality when testing a System-on-Chip is becoming a problem since it (the test data volume) must fit the ATE (Automa...
Erik Larsson, Stina Edbom
FPGA
2008
ACM
151views FPGA» more  FPGA 2008»
15 years 8 months ago
Beyond the arithmetic constraint: depth-optimal mapping of logic chains in LUT-based FPGAs
Look-up table based FPGAs have migrated from a niche technology for design prototyping to a valuable end-product component and, in some cases, a replacement for general purpose pr...
Michael T. Frederick, Arun K. Somani
NETWORKING
2004
15 years 8 months ago
Hierarchical Routing with QoS Constraints in Optical Transport Networks
Abstract. Optical Transport Networks (OTN) with automatical switching capabilities are named ASON. Hierarchical routing is required in the ASON recommendations to achieve scalabili...
Xavier Masip-Bruin, Sergio Sánchez-Ló...
TOG
2008
127views more  TOG 2008»
15 years 6 months ago
Animating responsive characters with dynamic constraints in near-unactuated coordinates
This paper presents a technique to enhance a kinematically controlled virtual character with a generic class of dynamic responses to small perturbations. Given an input motion seq...
Yuting Ye, C. Karen Liu
ISCI
2008
95views more  ISCI 2008»
15 years 6 months ago
Modified constrained learning algorithms incorporating additional functional constraints into neural networks
In this paper, two modified constrained learning algorithms are proposed to obtain better generalization performance and faster convergence rate. The additional cost terms of the ...
Fei Han, Qing-Hua Ling, De-Shuang Huang