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DATE
2000
IEEE
142views Hardware» more  DATE 2000»
15 years 11 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi
187
Voted
DCC
2000
IEEE
15 years 11 months ago
Arithmetic Coding for Low Power Embedded System Design
We present a novel algorithm that assigns codes to instructions during instruction code compression in order to minimize bus-related bit-toggling and thus reducing power consumpti...
Haris Lekatsas, Wayne Wolf, Jörg Henkel
179
Voted
EUROMICRO
2000
IEEE
15 years 11 months ago
Continuous Discrete-Event Simulation of a Continuous-Media Server I/O Subsystem
When designing computer systems, simulation tools are used to imitate a real or proposed system. Complex, dynamic systems can be simulated without the cost and time constraints in...
Michael Weeks, Chris Bailey, Reza Sotudeh
ICIP
2000
IEEE
15 years 11 months ago
Chromaticity Diffusion
—A novel approach for color image denoising is proposed in this paper. The algorithm is based on separating the color data into chromaticity and brightness, and then processing e...
Bei Tang, Guillermo Sapiro, Vicent Caselles
184
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ICPPW
2000
IEEE
15 years 11 months ago
Challenges in URL Switching for Implementing Globally Distributed Web Sites
URL, or layer-5, switches can be used to implement locally and globally distributed web sites. URL switches must be able to exploit knowledge of server load and content (e.g., of ...
Zornitza Genova, Kenneth J. Christensen
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