3220 search results - page 342 / 644 » Constrained Graph Processes |
214
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ICPR
2006
IEEE
16 years 7 months ago
2006
IEEE
Localizing objects in images is a difficult task and represents the first step to the solution of the object recognition problem. This paper presents a novel approach to the local...
153
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ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
16 years 3 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
190
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WWW
2010
ACM
16 years 1 months ago
2010
ACM
PageRank computes the importance of each node in a directed graph under a random surfer model governed by a teleportation parameter. Commonly denoted alpha, this parameter models ...
194
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ISPD
2010
ACM
16 years 1 months ago
2010
ACM
Double Patterning Lithography (DPL) is one of the few hopeful candidate solutions for the lithography for CMOS process beyond 45nm. DPL assigns the patterns less than a certain di...
172
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CIBCB
2008
IEEE
16 years 1 months ago
2008
IEEE
— We introduce a graph-based relational learning approach using graph-rewriting rules for temporal and structural analysis of biological networks changing over time. The analysis...