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CAV
1998
Springer
98views Hardware» more  CAV 1998»
15 years 10 months ago
Verification of Timed Systems Using POSETs
This paper presents a new algorithm for efficiently verifying timed systems. The new algorithm represents timing information using geometric regions and explores the timed state sp...
Wendy Belluomini, Chris J. Myers
ICCAD
1997
IEEE
86views Hardware» more  ICCAD 1997»
15 years 10 months ago
Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems
- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This e...
Kyosun Kim, Ramesh Karri, Miodrag Potkonjak
ISCA
1996
IEEE
103views Hardware» more  ISCA 1996»
15 years 10 months ago
Evaluation of Design Alternatives for a Multiprocessor Microprocessor
In the future, advanced integrated circuit processing and packaging technology will allow for several design options for multiprocessor microprocessors. In this paper we consider ...
Basem A. Nayfeh, Lance Hammond, Kunle Olukotun
DAC
1996
ACM
15 years 10 months ago
Integrating Formal Verification Methods with A Conventional Project Design Flow
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
Ásgeir Th. Eiríksson
PODS
1993
ACM
161views Database» more  PODS 1993»
15 years 10 months ago
Blocking for External Graph Searching
In this paper we consider the problem of using disk blocks efficiently in searching graphs that are too large to fit in internal memory. Our model allows a vertex to be represented...
Mark H. Nodine, Michael T. Goodrich, Jeffrey Scott...