The effect of kernel operations on cache optimisations in a soft-core reconfigurable system is important for dynamic cache switching design. Considering kernel operations changes ...
In this paper we describe an efficient implementation of the Tate and Ate pairings using Barreto-Naehrig pairing-friendly curves, on both a standard 32-bit PC and on a 32-bit smart...
Augusto Jun Devegili, Michael Scott, Ricardo Dahab
Static Linked Faults are considered an interesting class of memory faults. Their capability of influencing the behavior of other faults causes the hiding of the fault effect and m...
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Gi...
Timing failures refer to a situation where the environment in which a system operates does not behave as expected regarding the timing assumptions, that is, the timing constraints...
In this paper, we develop a method to analyze the probability of access failure in SRAM array (due to random Vt variation in transistors) by jointly considering variations in cell...