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FPL
2003
Springer
100views Hardware» more  FPL 2003»
15 years 12 months ago
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
Nazar A. Saqib, Francisco Rodríguez-Henr&ia...
DATE
2002
IEEE
104views Hardware» more  DATE 2002»
15 years 11 months ago
Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors
In this paper, we suggest hardware-assisted data compression as a tool for reducing energy consumption of core-based embedded systems. We propose a novel and e cient architecture ...
Luca Benini, Davide Bruni, Alberto Macii, Enrico M...
ICRA
2002
IEEE
110views Robotics» more  ICRA 2002»
15 years 11 months ago
Mobile Robot Localization using an Incremental Eigenspace Model
— When using appearance-based recognition for self-localization of mobile robots, the images obtained during the exploration of the environment need to be efficiently stored in t...
Matej Artac, Matjaz Jogan, Ales Leonardis
IEEEPACT
2002
IEEE
15 years 11 months ago
Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures
In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel’s SSE and Motorola’s AltiVec that su...
Jaewook Shin, Jacqueline Chame, Mary W. Hall
CODES
2000
IEEE
15 years 11 months ago
Heuristic tradeoffs between latency and energy consumption in register assignment
One of the challenging tasks in code generation for embedded systems is register allocation and assignment, wherein one decides on the placement and lifetimes of variables in regi...
R. Anand, Margarida F. Jacome, Gustavo de Veciana