Sciweavers

7189 search results - page 1292 / 1438
» Connecting Design with Code
Sort
View
IISWC
2009
IEEE
16 years 29 days ago
On the (dis)similarity of transactional memory workloads
— Programming to exploit the resources in a multicore system remains a major obstacle for both computer and software engineers. Transactional memory offers an attractive alternat...
Clay Hughes, James Poe, Amer Qouneh, Tao Li
ISCA
2009
IEEE
159views Hardware» more  ISCA 2009»
16 years 29 days ago
End-to-end register data-flow continuous self-test
While Moore’s Law predicts the ability of semi-conductor industry to engineer smaller and more efficient transistors and circuits, there are serious issues not contemplated in t...
Javier Carretero, Pedro Chaparro, Xavier Vera, Jau...
LANC
2009
ACM
158views Education» more  LANC 2009»
16 years 25 days ago
Enhancements to the opinion model for video-telephony applications
In this paper, we show how the proposed model in ITU-T Recommendation G.1070 “Opinion model for video-telephony applications” cannot model properly the perceptual video qualit...
Jose Joskowicz, José Carlos López-Ar...
IPPS
2008
IEEE
16 years 22 days ago
High performance MPEG-2 software decoder on the cell broadband engine
The Sony-Toshiba-IBM Cell Broadband Engine is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD coprocessing units (SPEs) ...
David A. Bader, Sulabh Patel
SASP
2008
IEEE
162views Hardware» more  SASP 2008»
16 years 21 days ago
Accelerating Compute-Intensive Applications with GPUs and FPGAs
—Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are F...
Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadr...
« Prev « First page 1292 / 1438 Last » Next »