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ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
16 years 3 months ago
Fast Cycle-accurate Behavioral Simulation for Pipelined Processors Using Early Pipeline Evaluation
Modeling and simulating pipelined processors in procedural languages such as C/C++ requires lots of cost in handling concurrent events, which hinders fast simulation. A number of ...
In-Cheol Park, Se-Hyeon Kang, Yongseok Yi
DATE
2009
IEEE
151views Hardware» more  DATE 2009»
16 years 1 months ago
Combined system synthesis and communication architecture exploration for MPSoCs
In this paper, a novel design space exploration approach is proposed that enables a concurrent optimization of the topology, the process binding, and the communication routing of ...
Martin Lukasiewycz, Martin Streubühr, Michael...
IPPS
2009
IEEE
16 years 29 days ago
Early experiences on accelerating Dijkstra's algorithm using transactional memory
In this paper we use Dijkstra’s algorithm as a challenging, hard to parallelize paradigm to test the efficacy of several parallelization techniques in a multicore architecture....
Nikos Anastopoulos, Konstantinos Nikas, Georgios I...
WFLP
2009
Springer
297views Algorithms» more  WFLP 2009»
16 years 28 days ago
Programming with Multiple Paradigms in Lua
Abstract. Lua is a scripting language used in many industrial applications, with an emphasis on embedded systems and games. Two key points in the design of the language that led to...
Roberto Ierusalimschy
DCOSS
2009
Springer
16 years 27 days ago
Combining Positioning and Communication Using UWB Transceivers
A new generation of ultra wideband (UWB) communication transceivers are becoming available which support both positioning and communication tasks. Transceiver manufacturers envisio...
Paul Alcock, Utz Roedig, Mike Hazas