Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
This paper introduces the queue-read, queue-write (qrqw) parallel random access machine (pram) model, which permits concurrent reading and writing to shared memory locations, but ...
Phillip B. Gibbons, Yossi Matias, Vijaya Ramachand...
—Atomic operations are important building blocks in supporting general-purpose computing on graphics processing units (GPUs). For instance, they can be used to coordinate executi...
Abstract. So-called "Smart Dust" is envisioned to combine sensing, computing, and wireless communication capabilities in an autonomous, dust-grain-sized device. Dense net...
In this paper, we investigate the use of bilingual parsing on parallel corpora to better estimate the rule parameters in a formal syntax-based machine translation system, which ar...