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159
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CONCURRENCY
2006
15 years 6 months ago
2006
To keep up with a large degree of instruction level parallelism (ILP), the Itanium 2 cache systems use a complex organization scheme: load/store queues, banking and interleaving. ...
158
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CONCURRENCY
2004
15 years 6 months ago
2004
-- One of the benefits of a computational grid is the ability to run high-performance applications over distributed resources simply and securely. We demonstrated this benefit with...
194
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CONCURRENCY
2000
15 years 6 months ago
2000
Java's support for parallel and distributed processing makes the language attractive for metacomputing applications, such as parallel applications that run on geographically ...
216
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WWW
2009
ACM
16 years 7 months ago
2009
ACM
We describe a system for synchronization and organization of user-contributed content from live music events. We start with a set of short video clips taken at a single event by m...
161
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FPGA
2010
ACM
16 years 1 months ago
2010
ACM
Triple Modular Redundancy (TMR) is a common reliability technique for mitigating single event upsets (SEUs) in FPGA designs operating in radiation environments. For FPGA systems t...