Sciweavers

5180 search results - page 849 / 1036
» Concurrency, Time, and Constraints
Sort
View
ICCAD
2005
IEEE
151views Hardware» more  ICCAD 2005»
16 years 3 months ago
Architecture and details of a high quality, large-scale analytical placer
Modern design requirements have brought additional complexities to netlists and layouts. Millions of components, whitespace resources, and fixed/movable blocks are just a few to ...
Andrew B. Kahng, Sherief Reda, Qinke Wang
ICCAD
2004
IEEE
125views Hardware» more  ICCAD 2004»
16 years 3 months ago
Temporal floorplanning using the T-tree formulation
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we model each task ...
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang
ICCAD
2002
IEEE
101views Hardware» more  ICCAD 2002»
16 years 3 months ago
Frame-based dynamic voltage and frequency scaling for a MPEG decoder
This paper describes a dynamic voltage and frequency scaling (DVFS) technique for MPEG decoding to reduce the energy consumption while maintaining a quality of service (QoS) constr...
Kihwan Choi, Karthik Dantu, Wei-Chung Cheng, Masso...
ICCAD
2002
IEEE
143views Hardware» more  ICCAD 2002»
16 years 3 months ago
A Markov chain sequence generator for power macromodeling
In macromodeling-based power estimation, circuit macromodels are created from simulations of synthetic input vector sequences. Fast generation of these sequences with all possible...
Xun Liu, Marios C. Papaefthymiou
CVPR
2010
IEEE
16 years 2 months ago
Visual Recognition and Detection Under Bounded Computational Resources
Visual recognition and detection are computationally intensive tasks and current research efforts primarily focus on solving them without considering the computational capability ...
Sudheendra Vijayanarasimhan, Ashish Kapoor