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ISPD
1999
ACM
95views Hardware» more  ISPD 1999»
15 years 11 months ago
Incremental capacitance extraction and its application to iterative timing-driven detailed routing
In this paper, we consider delay optimization in multilayer detailed routing. Given a detailed routing by some detailed router, we iteratively improve the delays of critical nets ...
Yanhong Yuan, Prithviraj Banerjee
MICRO
1999
IEEE
110views Hardware» more  MICRO 1999»
15 years 11 months ago
Balance Scheduling: Weighting Branch Tradeoffs in Superblocks
Since there is generally insufficient instruction level parallelism within a single basic block, higher performance is achieved by speculatively scheduling operations in superbloc...
Alexandre E. Eichenberger, Waleed Meleis
RTCSA
1999
IEEE
15 years 11 months ago
Incorporating Error Recovery into the Imprecise Computation Model
In this paper; we describe optimal algorithmsfor incorporating error recovery in the imprecise computation model. In that model eack task compriser a mandatory and an optional par...
Hakan Aydin, Rami G. Melhem, Daniel Mossé
AMAST
1998
Springer
15 years 11 months ago
Scheduling Algebra
The goal of this paper is to develop an algebraic theory of process scheduling. We specify a syntax for denoting processes composed of actions with given durations. Subsequently, w...
Rob J. van Glabbeek, Peter Rittgen
DAC
1997
ACM
15 years 11 months ago
Wire Segmenting for Improved Buffer Insertion
Buffer insertion seeks to place buffers on the wires of a signal net to minimize delay. Van Ginneken [14] proposed an optimal dynamic programming solution (with extensions propose...
Charles J. Alpert, Anirudh Devgan