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ICCAD
2000
IEEE
119views Hardware» more  ICCAD 2000»
15 years 11 months ago
Synthesis of Operation-Centric Hardware Descriptions
Most hardware description frameworks, whether schematic or textual, use cooperating finite state machines (CFSM) as the underlying abstraction. In the CFSM framework, a designer ...
James C. Hoe, Arvind
RTCSA
2006
IEEE
16 years 19 days ago
Instruction Scheduling with Release Times and Deadlines on ILP Processors
ILP (Instruction Level Parallelism) processors are being increasingly used in embedded systems. In embedded systems, instructions may be subject to timing constraints. An optimisi...
Hui Wu, Joxan Jaffar, Jingling Xue
FTRTFT
1992
Springer
15 years 10 months ago
Specification and Verification of Real-Time Behaviour Using Z and RTL
Real-Time Logic is a formal notation for reasoning about temporal behaviour. Z is a general purpose specification language, but lacks explicit features for expressing real-time co...
Colin J. Fidge
FORMATS
2006
Springer
15 years 10 months ago
Verification of the Generic Architecture of a Memory Circuit Using Parametric Timed Automata
Using a variant of Clariso-Cortadella's parametric method for verifying asynchronous circuits, we formally derive a set of linear constraints that ensure the correctness of so...
Remy Chevallier, Emmanuelle Encrenaz-Tiphèn...
DEDS
2007
84views more  DEDS 2007»
15 years 6 months ago
Just in Time Control of Constrained ( max , +)-Linear Systems
This paper deals with just in time control of (max, +)-linear systems. The output tracking problem, considered in previous studies, is generalized by considering additional constr...
Laurent Houssin, Sébastien Lahaye, Jean-Lou...