Sciweavers

5180 search results - page 122 / 1036
» Concurrency, Time, and Constraints
Sort
View
ISSS
1999
IEEE
85views Hardware» more  ISSS 1999»
15 years 10 months ago
Efficient Scheduling of DSP Code on Processors with Distributed Register Files
Code generation methods for digital signal processors are increasingly hampered by the combination of tight timing constraints imposed by the algorithms and the limited capacity o...
Bart Mesman, Carlos A. Alba Pinto, Koen Van Eijk
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
16 years 3 months ago
Simultaneous short-path and long-path timing optimization for FPGAs
This paper presents the Routing Cost Valleys (RCV) algorithm – the first published algorithm that simultaneously optimizes all short- and long-path timing constraints in a Field...
Ryan Fung, Vaughn Betz, William Chow
ECBS
2002
IEEE
119views Hardware» more  ECBS 2002»
15 years 11 months ago
Managing Complex Temporal Requirements in Real-Time Control Systems
Design and implementation of motion control applications includes the transition from control design to real-time system implementation. To make this transition smooth, the specif...
Kristian Sandström, Christer Norström
SIAMCO
2010
124views more  SIAMCO 2010»
15 years 1 months ago
Reachability and Minimal Times for State Constrained Nonlinear Problems without Any Controllability Assumption
We consider a target problem for a nonlinear system under state constraints. We give a new continuous level-set approach for characterizing the optimal times and the backward-reach...
Olivier Bokanowski, Nicolas Forcadel, Hasnaa Zidan...
VLSID
2002
IEEE
120views VLSI» more  VLSID 2002»
16 years 6 months ago
Floorplan Evaluation with Timing-Driven Global Wireplanning, Pin Assignment and Buffer/Wire Sizing
We describe a new algorithm for floorplan evaluation using timing-driven buffered routing according to a prescribed buffer site map. Specifically, we describe a provably good mult...
Christoph Albrecht, Andrew B. Kahng, Ion I. Mandoi...