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ICCD
2008
IEEE
142views Hardware» more  ICCD 2008»
16 years 1 months ago
Gate planning during placement for gated clock network
Abstract— Clock gating is a popular technique for reducing power dissipation in clock network. Although there have been numerous research efforts on clock gating, the previous ap...
Weixiang Shen, Yici Cai, Xianlong Hong, Jiang Hu
CODES
2007
IEEE
16 years 1 months ago
Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
Andreas Hansson, Martijn Coenen, Kees Goossens
INFOCOM
2007
IEEE
16 years 1 months ago
QoS-Driven Power Allocation Over Parallel Fading Channels With Imperfect Channel Estimations in Wireless Networks
— We propose the quality-of-service (QoS) driven power allocation schemes for parallel fading channels when considering imperfect channel estimations. In particular, the parallel...
Jia Tang, Xi Zhang
CSB
2005
IEEE
189views Bioinformatics» more  CSB 2005»
16 years 9 days ago
Learning Yeast Gene Functions from Heterogeneous Sources of Data Using Hybrid Weighted Bayesian Networks
We developed a machine learning system for determining gene functions from heterogeneous sources of data sets using a Weighted Naive Bayesian Network (WNB). The knowledge of gene ...
Xutao Deng, Huimin Geng, Hesham H. Ali
SAC
2005
ACM
16 years 8 days ago
Automatic learning of text-to-concept mappings exploiting WordNet-like lexical networks
A great jump towards the advent of the Semantic Web will take place when a critical mass of web resources is available for use in a semantic way. This goal can be reached by the c...
Dario Bonino, Fulvio Corno, Federico Pescarmona