4401 search results - page 539 / 881 » Computing with Default Logic |
199
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DAC
1996
ACM
15 years 11 months ago
1996
ACM
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
171
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ISSAC
1997
Springer
15 years 11 months ago
1997
Springer
Computer algebra systems typically drop some degenerate cases when evaluating expressions, e.g., x=x becomes 1 dropping the case x = 0. We claim that it is feasible in practice to...
173
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CF
2004
ACM
15 years 10 months ago
2004
ACM
In this paper we present a novel methodology for partial (re-)configuration that can be used for most bitstream configured hardware (HW). In particular low priced and not for part...
139
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DELTA
2004
IEEE
15 years 10 months ago
2004
IEEE
Complex arithmetic computations, especially if derived from bit-level software descriptions, can be very inefficient if implemented directly in hardware (e.g., by translation of t...
143
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FPL
2000
Springer
15 years 10 months ago
2000
Springer
Many applications can be modeled as subgraph isomorphism problems. However, this problem is generally NP-complete and difficult to compute. A custom computing circuit is a prospect...