4401 search results - page 526 / 881 » Computing with Default Logic |
167
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ASPDAC
1998
ACM
15 years 11 months ago
1998
ACM
−This paper describes a new redundant fault identification algorithm with Exclusive-OR circuit reduction. The experimental results using this algorithm with a FAN-based test patt...
155
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ICCAD
1994
IEEE
15 years 11 months ago
1994
IEEE
For a logic design with level-sensitive latches, we need to validate timing signal paths which may flush through several latches. We developed efficient algorithms based on the mo...
167
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APLAS
2006
ACM
15 years 10 months ago
2006
ACM
We present a modal language for distributed computation which addresses the safety of mobile values as well as mobile code. The safety of mobile code is achieved with the modality...
145
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ATAL
2006
Springer
15 years 10 months ago
2006
Springer
We outline meta-encoding schemas for compiling nonmonotonic logic theories into Verilog HDL (Hardware Description Language) descriptions. These descriptions can be synthesized int...
156
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ECAI
2004
Springer
15 years 10 months ago
2004
Springer
In this paper, we tackle the satisfiability problem for multi-context systems. First, we establish a satisfiability algorithm based on an encoding into propositional logic. Then, w...