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IPPS
2007
IEEE
16 years 1 months ago
A Study of Design Efficiency with a High-Level Language for FPGAs
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
Zain-ul-Abdin, Bertil Svensson
CONCUR
2005
Springer
16 years 9 days ago
Type-Directed Concurrency
Abstract. We introduce a novel way to integrate functional and concurrent programming based on intuitionistic linear logic. The functional core arises from interpreting proof reduc...
Deepak Garg, Frank Pfenning
HPCA
2004
IEEE
16 years 7 months ago
Reducing the Scheduling Critical Cycle Using Wakeup Prediction
For highest performance, a modern microprocessor must be able to determine if an instruction is ready in the same cycle in which it is to be selected for execution. This creates a...
Todd E. Ehrhart, Sanjay J. Patel
189
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SAC
2005
ACM
16 years 10 days ago
Knowledge based approach to semantic composition of teams in an organization
Finding rapidly suitable experts in an organization to compose a team able to solve specific tasks is a typical problem in large consulting firms. In this paper we present a Des...
Simona Colucci, Tommaso Di Noia, Eugenio Di Sciasc...
SBCCI
2004
ACM
111views VLSI» more  SBCCI 2004»
16 years 6 days ago
A partial reconfigurable architecture for controllers based on Petri nets
Digital Control System in the industry has been used in most of the applications based on expensive Programmable Logical Controllers (PLC). These Systems are, in general, highly c...
Paulo Sérgio B. do Nascimento, Paulo Romero...