We present a Language Prototyping System that facilitates the modular development of interpreters from independent semantic buildks. The abstract syntax is modelled as the fixpoint...
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
We propose to segment volumetric brain structures with a level set method including a fuzzy decision in the design of the evolution force. The role of fuzzy logic is to fuse gradi...
Synthesis of reversible logic has become a very important research area. In recent years several algorithms ? heuristic as well as exact ones ? have been introduced in this area. ...