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MICRO
2005
IEEE
105views Hardware» more  MICRO 2005»
16 years 4 days ago
Incremental Commit Groups for Non-Atomic Trace Processing
We introduce techniques to support efficient non-atomic execution of very long traces on a new binary translation based, x86-64 compatible VLIW microprocessor. Incrementally comm...
Matt T. Yourst, Kanad Ghose
RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
16 years 4 days ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
RTSS
2005
IEEE
16 years 4 days ago
Tardiness Bounds under Global EDF Scheduling on a Multiprocessor
We consider the scheduling of a sporadic real-time task system on an identical multiprocessor. Though Pfair algorithms are theoretically optimal for such task systems, in practice...
UmaMaheswari C. Devi, James H. Anderson
SBACPAD
2005
IEEE
176views Hardware» more  SBACPAD 2005»
16 years 4 days ago
Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation
The time required to simulate a complete benchmark program using the cycle-accurate model of a microprocessor can be prohibitively high. One of the proposed methodologies, represe...
Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy Kuri...
SMI
2005
IEEE
111views Image Analysis» more  SMI 2005»
16 years 4 days ago
Rational Spherical Splines for Genus Zero Shape Modeling
Traditional approaches for modeling a closed manifold surface with either regular tensor-product or triangular splines (defined over an open planar domain) require decomposing th...
Ying He 0001, Xianfeng Gu, Hong Qin
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