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ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
16 years 6 days ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
182
Voted
LCN
2002
IEEE
16 years 6 days ago
Optimization of AP Placement and Channel Assignment in Wireless LANs
—The design of a wireless local area network (WLAN) has an important issue of determining the optimal placement of access points (APs) and assignment of channels to them. WLAN se...
Youngseok Lee, Kyoungae Kim, Yanghee Choi
197
Voted
ICCAD
1997
IEEE
91views Hardware» more  ICCAD 1997»
15 years 11 months ago
Interconnect layout optimization under higher-order RLC model
In this paper, we study the interconnect layout optimization problem under a higher-order RLC model to optimize not just delay, but also waveform for RLC circuits with non-monoton...
Jason Cong, Cheng-Kok Koh
176
Voted
ICCAD
1994
IEEE
61views Hardware» more  ICCAD 1994»
15 years 11 months ago
Simultaneous driver and wire sizing for performance and power optimization
In this paper, we study the simultaneousdriver and wire sizing (SDWS) problem under two objective functions: (i) delay minimization only, or (ii) combined delay and power dissipat...
Jason Cong, Cheng-Kok Koh
182
Voted
EUROPAR
2006
Springer
15 years 11 months ago
Optimization of Dense Matrix Multiplication on IBM Cyclops-64: Challenges and Experiences
Abstract. This paper presents a study of performance optimization of dense matrix multiplication on IBM Cyclops-64(C64) chip architecture. Although much has been published on how t...
Ziang Hu, Juan del Cuvillo, Weirong Zhu, Guang R. ...