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VLSID
2002
IEEE
122views VLSI» more  VLSID 2002»
16 years 7 months ago
Evaluating Run-Time Techniques for Leakage Power Reduction
While some leakage power reduction techniques require modification of process technology achieving savings at the fabrication stage, others are based on circuit-level optimization...
David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishn...
184
Voted
VLSID
2002
IEEE
149views VLSI» more  VLSID 2002»
16 years 7 months ago
Functional Partitioning for Low Power Distributed Systems of Systems-on-a-Chip
In this paper, we present a functional partitioning method for low power real-time distributed embedded systems whose constituent nodes are systems-on-a-chip (SOCs). The systemlev...
Yunsi Fei, Niraj K. Jha
168
Voted
VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
16 years 7 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
VLSID
2002
IEEE
87views VLSI» more  VLSID 2002»
16 years 7 months ago
Simultaneous Circuit Transformation and Routing
In this paper, we propose a new methodology to integrate circuit transformation into routing. More specifically, this paper shows an approach for performing routing and wire recon...
Hiroaki Yoshida, Motohiro Sera, Masao Kubo, Masahi...
POPL
2007
ACM
16 years 7 months ago
Interprocedural analysis of asynchronous programs
An asynchronous program is one that contains procedure calls which are not immediately executed from the callsite, but stored and "dispatched" in a non-deterministic ord...
Ranjit Jhala, Rupak Majumdar
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