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DAC
1998
ACM
16 years 7 months ago
Exact Tree-based FPGA Technology Mapping for Logic Blocks with Independent LUTs
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
Madhukar R. Korupolu, K. K. Lee, D. F. Wong
DAC
1999
ACM
16 years 7 months ago
Power Efficient Mediaprocessors: Design Space Exploration
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
Johnson Kin, Chunho Lee, William H. Mangione-Smith...
DAC
1999
ACM
16 years 7 months ago
Engineering Change: Methodology and Applications to Behavioral and System Synthesis
Due to the unavoidable need for system debugging, performance tuning, and adaptation to new standards, the engineering change (EC) methodology has emerged as one of the crucial co...
Darko Kirovski, Miodrag Potkonjak
DAC
1999
ACM
16 years 7 months ago
Memory Exploration for Low Power, Embedded Systems
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
Wen-Tsong Shiue, Chaitali Chakrabarti
DAC
2000
ACM
16 years 7 months ago
An architecture-driven metric for simultaneous placement and global routing for FPGAs
FPGA routing resources typically consist of segments of various lengths. Due to the segmented routing architectures, the traditional measure of wiring cost (wirelength, delay, con...
Yao-Wen Chang, Yu-Tsang Chang
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